Digital-to-Analog Converters (DACs) have been used in the past to convert a series of digital signals into a corresponding analog signal. DACs are widely used wherever a digital signal is required to produce an analog voltage or current, and also as a major section of many successive approximation types of Analog-to-Digital Converters (ADCs). Specific examples are digitizers for professional quality audio signals, converters for the telephone industry and digitizers for seismology signals. In each case the system must handle peak input signals many times its normal operating range, yet linearity is of greatest concern when the input signal is of low amplitude.
There thus exists a large and important class of applications which require highly linear digital-to-analog conversion with low level signals. In the past, there have been two problems with the vast majority of commercially available high speed offset binary converters. First, for "center scale" offset binary converters, those that produce bipolar analog signals shifted about some center scale or offset voltage, they produce their largest non-linearities at center scale. This is because they use an offset binary or 2's complement input code in which the least significant bits (LSBs) about center scale are derived by matching one large resistance, the most significant bit (MSB) resistor, against another large resistance, the remainder of the resistors. Thus, error in any of the resistors produces a large error about center scale.
Secondly, for the "zero scale" offset binary converters in which a 10000 code is required to produce exactly zero analog voltage, not only is linearity about zero a problem, but also in the offset binary system, zero volts is obtained by bucking an offset current controlled by a large offset resistor against a current generated by the MSB resistor. Here again matching of two large resistances is required. Any mismatch results in unacceptable linearity.
In summary, for offset binary systems, the worst linearity occurs at its center code. In an offset binary application, the unipolar full scale is offset by half scale, which causes the worst code to fall at or near zero output voltage.
To avoid this problem, one approach in the past has been to use a "sign/magnitude" input code.
Sign/magnitude converters have included "dual" digital-to-analog conversion circuits, one provided with a positive reference voltage and the other supplied with a negative reference voltage. Two digital-to-analog converters are used so that a bipolar signal may be reproduced. By "bipolar" is meant a signal which has both positive and negative excursions about zero volts. These digital-to-analog converters contain a number of current sources, the outputs of which are summed at a summing node of an operational amplifier to convert the digital signals from precisely controlled current steps to precisely controlled voltage steps. For designs of this type, zero output is obtained by having all bits OFF. Non-zero outputs are obtained by turning ON some of the bits in one or the other of the DACs depending on whether positive or negative output is desired. Thus the sign/magnitude DAC is one in which two unipolar DACs are used, one to generate the positive going portion of the waveform and the other the negative. For 16 bit performance, the total system would have two separate 15 bit converters, one which produces positive output and one which produces a negative output, and provision for summing their outputs. The most significant bit, or sign bit input actuates logic to cause one of the DACs to be ON and the other OFF. For a code of one step above or below zero, only one least significant bit of one of the DACs is ON. All others are OFF, and hence the step size is just the weight of the LSB. The main disadvantages to this approach are primarily that it requires two matched DACs requiring twice the cost, power, size, etc. and also that it requires additional logic to turn on only the proper DAC.
A different type sign/magnitude DAC is one which includes a magnitude converter coupled to a low offset chopper stabilized amplifier which multiplies the output of the DAC by .+-.1, depending on the sign code. Thereafter the signal from the multiplier is amplified by an additional chopper stabilized amplifier. This type system is exemplified by the EDC Model 501 DAC in which sign switching occurs prior to amplification.
This approach has the obvious disadvantage of using two chopper stabilized amplifiers. The two amplifiers should also have matched low offsets to preserve linearity. While this type of system is useful for calibration instruments in which absolutely accurate voltage levels are required, the applications mentioned above do not require absolute accuracy but rather depend almost exclusively on linearity.